In the design of integrated circuits, the ability to detect small changes in voltage or current allows for realization of both high performance and low power consumption. This is possible because information indicating state of a signal can be detected and passed to subsequent stages of a circuit without having to wait for the signal to swing through its entire range, resulting in circuits with faster speed and lower power. Such technology is commonly used in memory arrays, which allow for high-speed access of individual memory elements. This technology can also be used to improve performance and power consumption when driving long wires and large capacitive loads, as well as for interfacing low voltage logic with regular logic operating under full supply voltage (e.g., Vdd). The enabling circuit for this technology typically is a sense amplifier circuit, which converts a small signal change (from the output of a low voltage circuit or from a signal source) into a relatively large signal that can be interfaced with the rest of the circuit.
In conventional single-ended, small signal sense amplifier circuits such as “class A” sense amplifier circuits, there are a number of items that are very difficult to control: biasing of the operating point; stability of the reference voltage; biasing current; sensitivity to threshold voltage; and process and temperature variations. This is especially true for circuits using future technology, due to increasing high leakage current and low supply voltage as transistors are scaled smaller, making such circuits very sensitive to voltage, temperature and process variations. For conventional differential-sense circuits, due to the increasing statistical variation between adjacent transistors in future technology, the advantage of differential mode small signal sensing is diminishing.
Another widely used circuit is a latch circuit. Latch circuits are used to hold data and logic states in large-scale integrated circuits. In a pipelined architecture, synchronous data flow is governed by a reference clock signal, which controls individual latches and latch-based registers, which are circuit blocks that either hold data or allow it to pass into the next pipeline stage. This technology significantly increases data throughput, which allows for high performance logic and memory circuits. By combining sense amplifier circuits and latch functionality into a single circuit block, high bandwidth signal amplification can be achieved.
Existing circuit techniques involve feeding the output of a sense amplifier circuit into a latch, which incurs the delay of two separate stages, thus making it difficult to attain high speed operation. Thus, there is a need to provide improved sense amplifier circuits, including circuits latching data, for uses such as signal sensing.